Porous Generator (Porogens) are pore-forming agents used to add porosity to dielectric materials. Subsequent removal of porogens creates a void space thereby reducing the overall dielectric constant of a film. In a conventional semiconductor device manufacturing process for patterning an ultra low-K dielectric or the like, an ultra low-K layer with porogens incorporated therein is first deposited on a substrate. This is followed by a UV cure process to remove substantially all of the porogens from the preliminary layer thus providing a porous dielectric layer with pores.
A photoresist pattern is subsequently formed on the porous a dielectric layer by exposure to a coherent optical light source or an E-beam through a reticle. The dielectric layer whose portion is not covered by the pattern is etched using the photoresist pattern as a mask to form a conductive layer pattern. The photoresist is removed leaving recesses in the dielectric layer where the conductive material is to be deposited. The conductive material is deposited over the surface and subjected to a chemical-mechanical polishing (CMP) process to isolate and define the conductive pattern. This process is repeated for additional layers.
The photoresist pattern is used as the mask and it should be removed from the dielectric layer with a photoresist remover in a strip process after the process for forming the conductive layer pattern is completed. However, it is difficult to remove photoresist material in the subsequent strip process since the etching process for forming a conductive layer pattern is performed with a dry etching process when making highly integrated devices and, as a result, the physical property of photoresist is deteriorated during the dry etching process.
Dry etching processes have replaced wet etching processes which use liquid acid compositions. In dry etching, gas-solid phase reactions are generated between a plasma etching gas and a targeted layer. Since sharp patterns are obtained with dry etching processes and they are easy to control, dry etching processes are preferred to wet etching processes.
After the photoresist pattern has gone through the dry etch process for forming openings in the dielectric layer, it has to be removed by O2 plasma. This photo resist strip will cause the surface of the low k to be modified. The modification will cause the k value to increase causing the RC delay to be degraded. The modification is basically caused by dissociation of C from the Si network in the low-k that was replaced with either H2O or Silanol.
A known approach of addressing the problem is to directly pattern the ULK layer using e-beam curing. This eliminates the need for a photoresist layer. However, the high dosage used for e-beam curing can cause device damage. Furthermore, the low throughput of e-beam curing is also undesirable.
Thus, a need still remains for a semiconductor system that will effectively remove all photoresist residue, without damaging the underlying dielectric layers, and aid in the further processing of the semiconductor wafer. In view of the ever increasing demand for higher volume and lower cost of integrated circuits, it is increasingly critical that answers be found to these problems. Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.